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publication# 19780 rev : c amendment: /0 issue date: october 1999 am79212/am79c202 advanced subscriber line interface circuit (aslic ? ) device advanced subscriber line audio-processing circuit (aslac ? ) device distinctive characteristics performs all of the functions of a codec-filter single channel architecture performs battery-feed, ring-trip, signaling, coding, hybrid, and test (borscht) functions single hardware design meets multiple country requirements through software programming gci interface ? control and pcm on one bus ? data rate up to 4.096 mhz monitor of two-wire interface voltage and current for subscriber line diagnostics low idle power per line on-hook transmission only battery and +5 v supplies needed exceeds lssgr and ccitt central office requirements off-hook and ground-key detectors with programmable thresholds programmable line feed characteristics independent of battery voltage built-in voice path test modes analog and digital hybrid balance capability adaptive hybrid balance capability linear power feed with power management and thermal shutdown features abrupt and smooth polarity reversal power cross detection in ringing and non- ringing states software programmable ? dc loop feed characteristics and current limit ? loop supervision detection thresholds ? off-hook detect debounce interval ? two-wire ac impedance ? transhybrid balance ? transmit and receive gains ? equalization ? digital i/o pins ? a-law/-law selection compatible with inexpensive protection networks. accommodates low-tolerance fuse resistors while maintaining longitudinal balance to bellcore specifications. power/service denial state small physical size integrated ring-trip function four relay drivers with built-in energy absorption zener diodes synchronized ring relay operation: zero volts ac on, zero current off software-enabled normal or automatic ring-trip state on-chip 12/16 khz metering generation with on- and off-meter pulse shaping supports loop-start and ground-start signaling. 0 c to 70 c commercial operation guaranteed by production testing ? 40 c to +85 c temperature range operation available
2 am79212/am79c202 data sheet table of contents distinctive characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 linecard block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 aslic device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 aslac device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 connection diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 aslic device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 aslac device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 aslic/aslac devices functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 electrical requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 absolute maximum electrical and thermal ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 aslic device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 aslac device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 operating ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 environmental . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 performance characteristics (see note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 aslic device relay driver schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 microprocessor interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 switching waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 input and output waveforms for ac tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 data clock timing ? dcl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 gci waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 aslic/aslac devices linecard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 physical dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 revision summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 list of figures figure 1. transmit and receive path attenuation vs. frequency . . . . . . . . . . . . . . . . . . . 23 figure 2. group delay distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 3. a-law gain linearity with tone input (both paths) . . . . . . . . . . . . . . . . . . . . . . . 25 figure 4. -law gain linearity with tone input (both paths) . . . . . . . . . . . . . . . . . . . . . . . 25 figure 5. total distortion with tone input (both paths) . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 6. a/a overload compression. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 7. aslic/aslac typical linecard schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 list of tables table 1. power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 2. aslic device dc specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 3. aslic device relay driver specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 4. aslic device transmission specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 5. aslac device dc specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 6. aslac device transmission and signaling specifications . . . . . . . . . . . . . . . . 19 table 7. microprocessor interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 8. data clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 9. user-programmable components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 10. aslic/aslac devices linecard parts list . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
aslic/aslac products 3 the am79212/am79c202 advanced subscriber line interface chip set implements a universal telephone line interface function. this enables the design of a single, low-cost, high-performance, fully-software-pro- grammable line interface card for multiple country ap- plications world wide. all ac, dc, and signaling parameters are fully programmable via the general control interface (gci). additionally, the aslic device and aslac device have integrated self test and line test capabilities to resolve faults to the line or line circuit. the integrated test capability is crucial for remote ap- plications where dedicated test hardware is not cost effective. use of the accompanying technical refer- ence, document pid 21324a is recommended. linecard block diagram transmit receive dc feed control metering loop voltage monitor loop current monitor aslic operating state relay driver inputs ad bd sa sb loop voltage sense resistors a(tip) b(ring) ringer supply ring-feed resistor relay driver outputs aslac device ringing-current sense resistors rfa aslic device rfb gci backplane ring and te s t relays
4 am79212/am79c202 data sheet ordering information aslic device amd standard products are available in several packages and operating ranges. the order number (valid combi- nation) is formed by a combination of the elements below. must order am79c202 with the device below. am79212 j c temperature range c = commercial (0 c to 70 c)* package type j = 32-pin plastic leaded chip carrier (pl 032) device number/description am79212 advanced subscriber line interface circuit valid combinations valid combinations list configurations planned to be supported in volume for this device. consult the local amd sales office to confirm availability of specific valid combinations and to check on newly released combinations. valid combinations am79212 jc note: * functionality of the device from 0c to +70c is guaranteed by production testing. performance from ?40c to +85c is guaranteed by characterization and periodic sampling of production units.
aslic/aslac products 5 aslac device amd standard products are available in several packages and operating ranges. the order number (valid combi- nation) is formed by a combination of the elements below. must order am79212 with the part below. am79c202 j c temperature range c = commercial (0 c to 70 c)* package type device number/description am79c202 advanced subscriber line interface circuit valid combinations valid combinations list configurations planned to be supported in volume for this device. consult the local amd sales office to confirm availability of specific valid combinations and to check on newly released combinations. j = 32-pin plastic leaded chip carrier (pl032) valid combinations am79c202 jc note: * functionality of the device from 0 c to +70 c is guaranteed by production testing. performance from ? 40 c to +85 c is guaranteed by characterization and periodic sampling of production units.
6 am79212/am79c202 data sheet connection diagrams top view hpb hpa bal1 vtx vref ringout ry2out tmg c5 c4 c2 c3 am79212 1 2 3 4323130 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 rsvd ry3out bal2 idc rsvd vbat c1 vdc vlbias idif isum gnd rsn ry1out vcc bgnd bd ad sb sa 32-pin plcc 19780a-003 aslic device 19780a-004 note: rsvd = reserved. do not connect to this pin. iref vlbias idif irtb irta rst dcl dd vccd s1 s2 s0 am79c202 1 2 3 4323130 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 iab fs isum idc vcca du i1 vm vout vref agnd vin vinm o1 i/o2 dgnd i/o1 c2 c1 ibat 32-pin plcc aslac device
aslic/aslac products 7 pin descriptions aslic device pin names type description ad, bd output a and b line drivers. these pins provide the currents to the a and b leads of the sub- scriber loop. bal1, bal2 input pre-balance. these pins receive voltages that are added to the vtx output signal. they can be used to cancel out the metering echo in the transmit path. bgnd gnd battery ground. this pin connects to the ground return for central office or talk battery. c2 ? c1 input aslic device control. these ternary logic input pins control the operating state of the aslic device. c5 ? c3 input test relay control. these are control inputs for the test relay drivers in the aslic device. a logic low turns on the relay driver and activates the relay. c3 controls ry1out, c4 controls ry2out, and c5 controls ry3out. gnd gnd analog and digital ground return for vcc. hpa, hpb capacitor high-pass filter capacitor connections. these pins connect to chp, the external high- pass filter capacitor that isolates the dc control loop from the voice transmission path. idc input dc loop control current. the dc loop current control line from the aslac device is con- nected to this pin. an internal resistance is provided between the idc pin and rsn. an external noise filter capacitor should be connected between this pin and vref. idif output a ? b leg current. the current at this pin is proportional to the difference of the currents flowing out of the ad pin and into the bd pin of the aslic device. isum output a + b leg current. the current at this pin is proportional to the absolute value of the sum of the currents flowing out of the ad pin and into the bd pin of the aslic device. ringout, ry1out, ry2out, ry3out output relay drivers. these are open collector, high-current relay driver outputs with emitters in- ternally connected to bgnd. to absorb the inductive pulse from the relay coils, an inter- nal zener diode is connected between the collector of each driver and bgnd. rsn input receive summing node. the metallic current (both ac and dc) between ad and bd is equal to the aslic device current gain, k1, times the current into this pin. networks that program receive gain and two-wire impedance connect to this node. this input is nomi- nally at vref potential. rsvd input reserved. this is used during amd testing. in the application, this pin must be floating. sa, sb input a and b lead voltage sense. these pins sense the voltages on the line side of the fuse resistors at the a and b leads. external sense resistors, rsa and rsb, are required to protect these pins from lightning or power cross conditions. tmg resistor thermal management. a resistor connected from this pin to vbat reduces the on-chip power dissipation by absorbing excess power from the aslic device for short loop con- ditions. vbat power battery voltage. this pin supplies battery voltage to the line drivers. vcc power power supply . this pin is the positive supply for low-voltage analog and digital circuits in the aslic device. vdc output dc loop voltage. the voltage on this output is referenced to vref and is proportional to the negative absolute value of the dc subscriber loop voltage between a and b. this volt- age is a fraction ( ) of the voltage between hpa and hpb. this pin connects to the iab pin on the aslac device through the external resistor rab. a voltage that is significantly more positive than vref on the vdc pin indicates that the aslic device is in thermal shutdown. vlbias input longitudinal offset voltage. the input to this pin is the offset reference voltage for the aslic device longitudinal control loop.
8 am79212/am79c202 data sheet aslac device vref input analog reference. this voltage is provided by the aslac device and is used by the aslic device for internal reference purposes. all analog input and output signals inter- facing to the aslac device are referenced to this pin. nominally set to 2.1 v. vtx output four-wire transmit signal. the voltage between this pin and vref is a scaled version of the ac component of the voltage sensed between the sa and sb pins. one end of the two-wire input impedance programming network connects to vtx. the voltage at vtx swings positive and negative about vref. pin names type description pin names type description agnd gnd analog (quiet) ground. vref is referenced to this ground. c2 ? c1 output aslic device control. these ternary logic output pins are dedicated to controlling the op- erating state of the aslic device. the levels of these outputs are logic high, logic low, and high impedance. dcl input gci clock. this input controls the clocking of the gci data and is also used as the master clock for the codec and dsp. 2.048 mhz or 4.096 mhz clock frequencies can be used. in either case, the gci bit rate is always 2.048 mhz. dd input downstream gci data. downstream data is received serially on the dd port every 125 s at the dcl rate. dgnd gnd digital ground. this is the digital ground return. du output upstream gci data. upstream data is sent serially on the du pin every 125 s at the dcl rate. du is high impedance between bursts. this pin is an open drain output. fs input frame sync. the frame sync signal is an 8 khz pulse that identifies the beginning of a gci frame. the aslac device references the timing of back-plane data transfer to this input. the back-plane data bit rate must be synchronized to dcl. i1 input control port. this input port is ttl compatible and can be used to monitor an external ttl compatible device. the logic state of this pin appears in the i1 bit (bit 2) of the up- stream c/i channel. iab input loop voltage sense. the iab pin is a current summing node referenced to vref. an ex- ternal resistor (rab) is connected between this pin and the vdc pin of the aslic device. in normal operation, current flows out of this pin. when the aslic device is in thermal shutdown, current will be forced into this pin. ibat input battery voltage sense. the ibat pin is a current summing node referenced to agnd and receives a current that is proportional to the system battery voltage. a sense resistor/ca- pacitor network is connected between the vbat pin of the aslic device and the ibat pin. idc output dc loop control current. the idc output supplies a current to the aslic device for pro- portional control of the dc loop current flowing through the subscriber loop. idif input longitudinal sense. idif is a current input pin and is fed by the idif pin of the aslic de- vice. the current in this pin is used by the aslac device for supervisory and diagnostic functions. the idif pin has an internal input resistance so an external longitudinal noise- filter capacitor can be connected. i/o1, i/o2 input/output control ports. these control lines are ttl compatible and each can be programmed as an input or an output. when programmed as inputs, they can monitor external, ttl-com- patible logic circuits. in the output mode, these pins are controlled by the i/o1 and i/o2 bits in the downstream c/i channel. in the output or input modes, the logic state of these pins appears in the i/o1 and i/o2 bits of the upstream c/i channel. when programmed as outputs, they can control an external logic device or they can be connected to pin c3, c4, or c5 of the aslic device to control test relay drivers ry1out, ry2out, and ry3out.
aslic/aslac products 9 iref input current reference. an external resistor (rref) connected between this pin and analog ground generates an accurate on-chip reference current. this current is used by the aslac device in its dc feed and loop-supervision circuits. irta, irtb inputs ring-trip sense. these pins are current summing nodes referenced to vref. they pro- vide terminations for external resistors rsr1 and rsr2 that sense the voltages on both sides of the ringing-feed resistor connected to the ring bus. to determine the ringing cur- rent in the loop, the aslac device finds the difference between the currents in these pins. isum input metallic sense. isum is a current input pin and is fed by the isum pin of the aslic device. the current in this pin is used by the aslac device for supervisory and diagnostic func- tions. o1 output control port. this output port is ttl compatible and is controlled by the o1 bit (bit 2) in the downstream c/i channel. it can control an external logic device or it can be connected to pin c3, c4, or c5 of the aslic device to control relays. rst input reset. a logic 1 on this pin resets the aslac device to initial default conditions. a signal less than 100 ns in duration should not cause a reset. to ensure proper reset, the mini- mum length of a reset pulse is 50 s. s0, s1, s2 input gci channel identification straps. when the input pins are individually strapped to vcc or dgnd, the aslac device can be coded to communicate with one of the eight gci channels within a frame. vcca power analog power supply. vcca is internally connected to substrate near the analog i/o section. vccd power digital power supply. vccd is internally connected to substrate near the digital section. vin input analog input. the analog output (vtx) from the aslic device is applied to the aslac device transmit path input, vin. the signal is sampled, processed, encoded, and placed on the upstream gci port. vinm output inversion of analog input. an inverted version of the analog input voltage on vin appears on this pin. vlbias output longitudinal reference. vlbias is programmed by voff and supplies the longitudinal reference voltage for the longitudinal control loop to the aslic device. vm output 12 khz or 16 khz metering signal. for 12 khz or 16 khz teletax, an internally generated and shaped 12 khz or 16 khz sine wave metering pulse is output from this pin. vout output analog output. the voice data from the downstream gci port, b1 channel, is digitally processed and converted to an analog signal that is sent out of the vout pin to the aslic device. vref output analog reference. this pin provides a voltage reference to be used as the analog zero- level reference on the aslic device. pin names type description
10 am79212/am79c202 data sheet aslic/aslac devices functional description the aslic/aslac devices chip set integrates all func- tions of the subscriber line. the chip set comprises an aslic device and an aslac device. the set provides two basic functions: 1) the aslic device, a high-volt- age, bipolar device that drives the subscriber line, main- tains longitudinal balance, and senses line conditions, and 2) the aslac device, a low-voltage, cmos device that combines codec, dc feed control, and line su- pervision. a complete schematic of a linecard using the aslic/aslac devices chip set is shown in figure 7. the aslic device uses reliable, bipolar technology to provide the power necessary to drive a wide variety of subscriber lines. it can be programmed by the aslac device to operate in eight different states that control power consumption and signaling modes. this en- ables full control over the subscriber loop. the aslic device is customized to be used exclusively with the aslac device providing a two-chip universal line inter- face. the aslic device requires only a +5 v power supply and a negative battery supply for its operation. the aslic device implements a linear loop current feeding method with the enhancement of thermal man- agement to limit the amount of power dissipated on the aslic device by dissipating excess power in an exter- nal resistor. the aslac device is a high-performance, cmos codec/filter device with additional digital filters and circuits that allow software control of transmission, dc feed, and supervision. advanced cmos technology makes the aslac device an economical device that has both the functionality and the low power consumption required by linecard design- ers to maximize linecard density at minimum cost. when used with an aslic device, the aslac device provides a complete software-configurable solution to linecard functions as well as complete programmable control over subscriber line dc feed characteristics. in addition, the aslic/aslac devices chip set provides system-level solutions for the loop supervisory functions and metering. in total, the aslic/aslac devices chip set provides a programmable solution that can satisfy world- wide linecard requirements by software configuration. all software-programmed coefficients and dc feed pa- rameters are easily calculated with the amslac3 ? soft- ware. this software is provided free of charge and runs on an ibm-compatible pc. it allows the designer to enter a description of system requirements, then the software returns the necessary coefficients and the predicted system response. the aslac device uses the general control interface (gci) protocol to interface with the back plane highway. the aslic device interface unit inside the aslac device processes information regarding line voltages, loop cur- rents, and battery voltage levels. these inputs allow the aslac device to place several key aslic device perfor- mance parameters under programmable supervision. the main functions that can be observed and/or controlled through the aslac device control interface are: dc feed characteristics ground-key detection off-hook detection metering signal longitudinal operating point subscriber line voltage and currents ring trip abrupt and smooth battery polarity reversal to accomplish these functions, the aslac device col- lects the following information from the aslic device and the central office system: the sum and difference of the currents in each loop leg, isum, and idif currents proportional to: ? the voltage across the loop (iab) ? the battery voltage (ibat) ? the ringing current in the loop (irta - irtb) the outputs supplied by the aslac device are then: a current proportional to the desired dc loop cur- rent (idc) a voltage proportional to the desired longitudinal off- set voltage (vlbias) a 12/16 khz metering signal (appears on vm for 12/16 khz teletax) the aslac device performs the codec and filter func- tions associated with the four-wire section of the sub- scriber line circuitry in a digital switch. these functions involve converting an analog voice signal into digital pcm samples and converting digital pcm samples back into an analog signal. during conversion, digital filters are used to band-limit the voice signals. the user-programmable filters set the receive and transmit gain, perform the transhybrid balancing func- tion, permit adjustment of the two-wire termination im- pedance, and provide frequency attenuation adjustment (equalization) of the receive and transmit paths. adaptive transhybrid balancing is also included.
aslic/aslac products 11 the pcm data can be either 8-bit companded a-law or -law code. voice and control data are read or written to the digital interface in channels that are pin strap compatible. besides the codec functions, the aslac device pro- vides all the sensing, feedback, and clocking neces- sary to completely control aslic device functions with programmable parameters. system-level parameters under programmable control include active and dis- able loop-current limits, feed resistance, and apparent battery-feed voltage. the longitudinal operating point is programmable to optimize the aslic device signal swing capability. the aslac device provides signals at 12 or 16 khz for metering functions. the frequency and level of these signals are programmable. the aslac device provides extensive loop supervision capability, including off-hook, ring-trip, and ground-key detection. detection thresholds for these functions are programmable. a programmable debounce timer is available that eliminates false detection due to contact bounce. for subscriber line diagnostics, ac and dc line conditions can be monitored using special test modes. results are sent upstream over the control interface.
12 am79212/am79c202 data sheet electrical requirements power dissipation loop resistance = 0 to (not including fuse resistors), 2 x 50 ? fuse resistors, v bat = ? 48 v, v cc = +5 v. for power dissipation measurements, dc feed conditions are programmed as follows: vapp (apparent voltage) = 50.2 v ila (active state current limit) = 42.3 ma ild (disable state current limit) = 21.2 ma rfd (feed resistance) = 807 ? vas (anti-sat activate voltage) = 8.2 v n2 (anti-sat feed resistance factor) = 2 voff (longitudinal offset voltage) = 6 v rtmg (thermal management resistor) = 1200 ? rref (referenced current setting resistor) = 7.87 k ? thermal resistance the junction-to-air thermal resistance of the aslic de- vice in a 32-pin, plcc package will be less than 45 c/ w. the junction-to-air thermal resistance of the aslac de- vice in a 32-pin, plcc package will be less than 45 c/ w. table 1. power dissipation description test conditions min typ max unit on-hook disconnect 30 70 mw aslic device power dissipation on-hook standby 50 105 normal polarity on-hook disable 120 215 on-hook active 330 450 off-hook active r l = 294 ? 850 1200 off-hook disable r l = 600 ? 800 950 aslac device power dissipation aslac device activated 85 110 mclk, pclk = 2.048 mhz aslac device inactive, c/i standby state command issued 22 25
aslic/aslac products 13 absolute maximum electrical and thermal ratings aslic device storage temperature .................. ? 55 c t a +150 c ambient temperature, under bias............................... ? 40 c t a +85 c ambient relative humidity (noncondensing) ..................................... 5 to 100% v cc with respect to agnd/dgnd ........ ? 0.4 v to +7 v v bat with respect to bgnd ................ +0.4 v to ? 75 v v cc with respect to v bat ....................................+80 v bgnd with respect to agnd/dgnd ................................ ? 0.5 v to +0.5 v voltage on relay outputs .......................................+7 v ad or bd to bgnd: continuous..................................... ? 75 v to +1.0 v 10 ms (f = 0.1 hz) ............................. ? 75 v to +5 v 1 s (f = 0.1 hz) .............................. ? 90 v to +10 v 250 ns (f = 0.1 hz) ........................ ? 120 v to +15 v current into sa or sb: 10 s rise to ipeak; 1000 s fall to 0.5 ipeak; 2000 s fall to i = 0 ..........................ipeak = 5 ma current into sa or sb: 2 s rise to ipeak; 10 s fall to 0.5 ipeak; 20 s fall to i = 0 .........................ipeak = 12.5 ma current through ad or bd..............................150 ma c5 ? c1 to dgnd or agnd................ ? 0.4 v to v cc + 0.4 v maximum power dissipation, t a = 70 c ...........1.67 w note: thermal limiting circuitry on chip will shut down the cir- cuit at a junction temperature of about 160 c. the device should never be exposed to this temperature. operation above 145 c junction temperature may degrade device reli- ability. see the slic packaging considerations for more in- formation. aslac device storage temperature................... ? 60 c t a +125 c ambient temperature, under bias ............................... ? 40 c t a +85 c ambient relative humidity (noncondensing)......................................5 to 100% v cca , v ccd with respect to dgnd....... ? 0.4 v to + 6 v v cca with respect to v ccd ................................ 0.4 v v in with respect to dgnd ....... ? 0.4 v to v cca + 0.4 v agnd .....................................................dgnd 0.4 v latch up immunity (any pin) .......................... 100 ma any other pin with respect to dgnd ................. ? 0.4 v to vcc + 0.4 v stresses above those listed under absolute maximum ratings may cause permanent device failure. functionality at or above these limits is not implied. exposure to absolute maximum rat- ings for extended periods may affect device reliability. operating ranges environmental ambient temperature ......... 0 c to +70 c commercial* ambient relative humidity ......................... 15% to 85% aslic device v cc .............................................................. +5 v 5% v bat ..................................................... ? 18 v to ? 70 v bgnd with respect to gnd ........ ? 100 mv to +100 mv load resistance on v tx to ground............... 10 k ? min aslac device supplies v cca , v ccd ................................ +5.0 v 5% dgnd ..................................................................... 0 v agnd ..................................................dgnd 50 mv operating ranges define those limits over which the function- ality of the device is guaranteed by production testing. * functionality of the device from 0 c to +70 c is guaranteed by production testing. performance from ? 40 c to +85 c is guaranteed by characterization and periodic sampling of pro- duction units.
14 am79212/am79c202 data sheet performance characteristics (see note 1) (see note 1) t a = 0 c to 70 c unless otherwise noted. table 2. aslic device dc specifications no. item condition min typ max unit note 1 2-wire loop voltage standby state, r l = 1 meg ? v bat ? 1.8 v bat ? 1.1 v bat ? 0.5 v 4 active state, rl ad ? bd = 600 ? irsn = 140 a 19.51 21.1 22.68 disable state, rl ad ? bd = 600 ? irsn = 80 a 11.34 12.19 13.04 2 feed resistance per leg at pins ad and bd standby state 130 250 375 ? 3 isum current standby state, r l = 1930 ? 44.6 56 a idif current standby state a to v bat b to ground 35.4 43.4 4 ternary input voltage boundaries for c2 ? c1 pins. mid- level input source must be high impedance or 3-state low boundary 0.8 v high boundary v cc ? 1 logic inputs c2 ? c1 input high current ? 80 200 a input low current 90 200 3-state voltage i c1 = i c2 = 1 a 0.8 3.5 v 4 5 logic inputs c5 ? c3 input high voltage 2.0 input low voltage 0.8 input high current ? 200 40 a input low current ? 400 40 6 v tx output offset bal1 pin open ? 50 +50 mv 7v ref input voltage iref = 1 ma 2.0 2.1 2.2 v 8 , ratio of v dc to loop voltage: tj < 145 c, v dc is referenced to v ref , 35.7 k ? resistor con- nected from v dc to v ref . vsa ? vsb = 40 v. 0.0253 0.0242 0.0232 v/v 9 thermal shutdown threshold voltage output on vdc i vdc = 20 a 4.2 v cc ? 0.4 v 4 10 gain from vlbias pin to ad or bd pin 5.58 6.0 6.42 v/v 11 input resistance to agnd, vlbias pin vlbias = 3 v 20 33.3 k ? 12 isum/iloop iloop = 10 ma 1/333 1/300 1/273 13 idif/ilong ilong = 10 ma 1/667 1/600 1/546 vdc vref ? vsa vsb ? ------------------------------------ =
aslic/aslac products 15 aslic device relay driver schematic no. item condition min typ max unit note 14 input current, sa and sb pins 13 a 4 15 input current hpa and hpb pins 0.1 3 16 idc input impedance 1.26 1.8 3 k ? 17 k1 incremental dc current gain 254 a/a 13 18 metallic offset current 0 ? 0.4 ma table 3. aslic device relay driver specifications item condition min typ max unit note on voltage 25 ma per relay sink 1 relay on 0.225 +0.3 v 4 relays on 0.4 0.5 4 40 ma per relay sink 1 relay on 0.45 0.7 4 relays on 0.8 +1.0 4 off leakage, each relay driver. v oh = +6 v 0 100 a table 2. aslic device dc specifications (continued) ringout ry1out ry2out ry3out bgnd table 4. aslic device transmission specifications no. item condition min typ max unit note 1r sn input impedance f = 300 hz to 3400 hz 1 ? 4 2v tx output impedance 3 3 gain, bal1 to v tx 1.4 1.5 1.6 v/v 4 gain, bal2 to v tx 2.8 3.0 3.2 5 bal1 input impedance 3.17 5 7.5 k ? 6 bal2 input impedance 2.09 3.3 4.95 7 input impedance a or b to gnd 70 135 ? 8 2- to 4-wire gain t a = 0 c to70 c, ? 10 dbm, 1 khz t a = ? 40 c to 0 c/70 c to 85 c ? 12.19 ? 12.24 ? 12.04 ? 11.89 ? 11.84 db
16 am79212/am79c202 data sheet no. item condition min typ max unit note 9 2- to 4-wire gain variation with frequency 300 to 3400 hz relative to 1 khz t a = ? 40 c to 0 c/70 c to 85 c ? 0.1 ? 0.15 +0.1 +0.15 db 10 2- to 4-wire gain tracking +3 dbm to ? 55 dbm reference: ? 10 dbm t a = ? 40 c to 0 c/70 c to 85 c ? 0.1 ? 0.15 +0.1 +0.15 11 4- to 2-wire gain ? 10 dbm, 1 khz t a = ? 40 c to 0 c/70 c to 85 c ? 0.15 ? 0.20 0+0.15 +0.20 12 4- to 2-wire gain variation with frequency 300 to 3400 hz relative to 1 khz t a = ? 40 c to 0 c/70 c to 85 c ? 0.1 ? 0.15 +0.1 +0.15 13 4- to 2-wire gain tracking +3 dbm to ? 55 dbm reference: ? 10 dbm t a = ? 40 c to 0 c/70 c to 85 c ? 0.1 ? 0.15 +0.1 +0.15 14 total harmonic distortion 2-wire 300 hz to 3400 hz 0 dbm +4 dbm ? 50 ? 40 4-wire ? 12 dbm ? 8 dbm ? 50 ? 40 2-wire metering overload level vlbias = 2.4 v, iloop = 30 ma, v bat = ? 60 v, dc load = 200 ? , load at 16 khz = 10 k ? 42 vp-p 4 15 idle channel noise c-message active and disable states 2-wire t a = ? 40 c to 0 c/70 c to 85 c +7 +11 +15 dbrnc 4 weighted 4-wire ? 54 psophometric 2-wire t a = ? 40 c to 0 c/70 c to 85 c ? 83 ? 79 ? 75 dbmp weighted 4-wire ? 95 4 16 longitudinal balance (ieee method) normal polarity l - t 200 to 1000 hz t a = ? 40 c to 0 c/70 c to 85 c 1000 to 3400 hz t a = ? 40 c to 0 c/70 c to 85 c 58 53 53 48 63 58 db t - l 200 to 3400 hz 40 l - t, il = 0 50 to 3400 hz 63 4 reverse polarity l - t 200 to 1000 hz t a = ? 40 c to 0 c/70 c to 85 c 50 48 17 psrr (v bat ) 50 to 3400 hz 25 45 3, 5 3.4 khz to 50 khz 25 40 4 aslic device in anti-sat state (loop open) f = 50 hz, cb = 100 nf f = 200 to 3400 hz, cb = 100 nf 2 12 4, 8 18 psrr (v cc ) 50 to 3400 hz 25 45 3, 5 3.4 khz to 50 khz 25 35 2, 4 table 4. aslic device transmission specifications (continued)
aslic/aslac products 17 no. item condition min typ max unit note 19 low frequency induction (rea method) active state, vlong = 30 v rms, i l = 20 ma, f = 60 hz +23 dbrnc 4 20 longitudinal ac current per wire f = 15 to 60 hz 20 marms table 5. aslac device dc specifications no. item condition min typ max unit note 1 input low voltage dd, fs, dcl, rst, i1, i/o1, i/o2 ? 0.4 0.8 v s0, s1, s2 ? 0.4 0.6 2 input high voltage dd, fs, dcl, rst, i1, i/o1, i/o2 2.0 v cc + 0.5 s0, s1, s2 v cc ? 0.5 v cc + 0.4 3 input leakage current dd, fs, dcl, rst, i1, i/o1, i/o2, s0, s1, s2 ? 10 +10 a 4 input hysteresis dd, fs, dcl, rst 0.5 v 4 5 ternary output voltages c2 ? c1 high voltage i out = 200 a v cc ? 0.85 v low voltage i out = 200 a 0.65 output current mid level ? 1+1a 6 output low voltage on digital outputs i/o1, i/o2, 01, du i ol = 10 ma 1.0 v i ol = 2 ma 0.4 7 output high voltage i/o1, i/o2, 01 i oh = 400 a v cc ? 0.4 table 4. aslic device transmission specifications (continued)
18 am79212/am79c202 data sheet no. item condition min typ max unit note 8dc feed idc ila = 47.6 ma, rfd = 403 ? , n2 = 2, vas = 10.3 v, ibat = 69.9 a active state, normal polarity, iab = 0, vapp = 50.2 v 172.7 188.5 204.9 a 17 in resistive-feed region 0.0624 0.0694 0.0764 a/a 17 iab ibat = 69.9 a adjust iab until idc = 0 27.93 29.93 31.93 a measured vapp programmed vapp = 50.2 v 2.2 v measured vas programmed vas = 10.3 v 1.6 9 idc error among programmed ila, ild any ila or ild programmed value > 20 ma (idc > 78.7 a) 5 % 4, 17 any ila or ild programmed value 20 ma (idc 78.7 a) 4 a17 10 offset voltage allowed on v in ? 50 +50 mv 10 11 v out offset voltage aisn off ? 40 +40 mv 10, 17 aisn on ? 80 +80 12 output voltage, v ref load current = 0 to 1 ma source or sink 2.0 2.1 2.2 v 17 13 capacitance load on v ref or v out 200 pf 4 14 output current v out source or sink ? 1+1ma 15 input resistance idif pin to v ref 8.84 13.6 18.36 k ? 6 16 vlbias operating voltage source current < 250 a or sink current < 25 a +1 +2.4 v 17 17 percent error of vlbias voltage for vlbias equation, see lon- gitudinal control loop section ? 5+5% 18 capacitance load on vlbias 120 pf 6 19 capacitance load on irta or irtb 400 table 5. aslac device dc specifications (continued) ? iab ? idc -------------- -
aslic/aslac products 19 table 6. aslac device transmission and signaling specifications no. item condition min typ max unit note 1 insertion loss a-d d-a a-d + d-a input: 1014 hz, ? 10 dbm0 rg = ar = ax = gr = gx = 0 db, aisn, r, x, b, and z filters disabled t a = 0 c to 70 c t a = ? 40 c to 0 c/70 c to 85 c t a = 0 c to 70 c t a = ? 40 c to 0 c/70 c to 85 c t a = 70 c t a = 0 c to 70 c; vcc = 4.75 ? 5.25 v t a = ? 40 c to 0 c/70 c to 85 c ? 0.25 ? 0.30 ? 0.25 ? 0.30 ? 0.20 ? 0.25 ? 0.34 0 0 0 0 +0.25 +0.30 +0.25 +0.30 +0.20 +0.25 +0.34 db 7 2 level set error (error between setting and actual value) a-d ax + gx ? 0.1 +0.1 d-a ar + gr ? 0.1 +0.1 3 dd to du gain in full digital loopback mode dd input: 1014 hz, ? 10 dbm0 rg = ar = ax = gr = gx = 0 db, aisn, r, x, b, and z filters disabled t a = 0 c to 70 c t a = ? 40 c to 0 c/70 c to 85 c ? 0.2 ? 0.25 +0.1 +0.4 +0.50 4 idle channel noise, psophometric weighted (a-law) ax = 0 db ar = 0 db a-d (pcm output) ? 68 dbm0p 12 d-a (v out ) ? 78 5 idle channel noise, c-message weighted (-law) ax = 0 db ar = 0 db a-d (pcm output), gx = +8 db +16 dbrnc0 d-a (2 wire), gr = ? 8 db +12 6 coder offset decision value, xn a-d, input signal = 0 v, a-law ? 5+5bits6 7 gx step size 0 gx < 10 db 10 gx 12 db 0.1 0.3 db 4 8 gr step size ? 12 gr 0 db 0.1 9 psrr (v cc ) image frequency input: 4800 to 7800 hz 200 mv p-p measure 8000 hz input frequency a-d 37 db 4 d-a 37 10 group delay pclk 1.53 mhz pclk 1.03 mhz 1014 hz; ? 10 dbm0 b, x, r, and z filters programmed with null coefficients 590 655 s4, 14
20 am79212/am79c202 data sheet notes: 1. unless otherwise specified, test conditions are: v cc = 5 v, r tmg = 1200 ? , bat = ? 51 v, r ab = 35.7 k, r bat1 = r bat2 = 365 k ? , r ref = 7.87 k ? , r rx = 75 k ? , r l = 600 ? , r sa = r sb = 200 k ? , c hp = 220 nf, c dc1 = 1.0 f, 5 0 ? fuse resistors, r sr1 = r sr2 = 750 k ? , c ad = c bd = 22 nf, c b = 100 nf and the following network is connected between v tx and r sn : no. item condition min typ max unit note 11 switchhook thresholds all tsh settings ? 0.45 or ? 10 +0.45 or +10 ma % 9, 15, 18 switchhook hysteresis ? 10 % 4 12 ground-key thresholds all tgk settings ? 0.90 or ? 10 +0.90 or +10 ma % 9, 15, 18 ground-key hysteresis ? 10 % 4 13 voltage that sets thermal shutdown bit voltage on aslic device v dc with r ab = 35.7 k ? +4.19 v 14 idif fault current thresholds tip-to-battery fault current (ma) ft, pkft 19.3, 50.6 ? 10 +10 % 9, 15, 18 ft, pkft hysteresis ? 10 4 15 aisn gain accuracy g aisn = 0.0625 ? 16 +16 g aisn = 0.125 ? 8+8 g aisn = 0.1875 ? 6+6 g aisn = ? 0.25 or g aisn +0.25 ? 4+4 16 metering voltage (mtra) accuracy measured at aslac device vm pin ? 7+7 17 metering voltage noise wide-band signal to noise 40 db 18 ring-trip accuracy 0 c to 70 c ? 5 +5 % 4, 16, 19 19 ring-trip hysteresis v zx i zx 4 5 v a ? 4, 16 20 power-cross accuracy during transmission ? 10 +10 % 19 during ringing ? 10 +10 4, 16, 19 table 6. aslac device transmission and signaling specifications (continued) rt1 18.75 k rt2 18.75 k ct 430 pf vtx rsn
aslic/aslac products 21 ambient temperature = 70 c active state, normal polarity for transmission performance 0 dbm = 1 mw @ 600 ? (0.775 v rms) programmed dc feed conditions: vapp (apparent battery voltage) = 50.2 v ila (active state loop-current limit) = 47.6 ma ild (disable state loop-current limit) = 21.2 ma rfd (dc feed resistance) = 403 ? vas (anti-sat activate voltage) = 10.3 v n2 (anti-sat feed resistance factor) = 2 voff (longitudinal offset voltage) = 8.4 v rg = gx = gr = ax = ar = 0 db r, x, b, and z filter disabled aisn = 0 tsh < ild tsh = programmed switchhook-detect threshold current. ild = programmed disable limit current. dc feed conditions are normally set by the aslac device. when the aslic device is tested by itself, its operating conditions must be simulated as if it were connected to an ideal aslac device. when the aslac device is tested by itself, its operating conditions must simulate as if it were connected to an ideal aslic device. 2. these tests are performed with the following load impedances: frequency < 12 khz ? longitudinal impedance = 500 ? ; metallic impedance = 300 ? frequency > 12 khz ? longitudinal impedance = 90 ? ; metallic impedance = 135 ? 3. this parameter is tested at 1 khz in production. performance at other frequencies is guaranteed by characterization. 4. not tested or partially tested in production. this parameter is guaranteed by characterization or correlation to other tests. 5. when the aslic device is in the anti-sat operating region, this parameter will be degraded. the exact degradation will depend on system design. 6. guaranteed by design. 7. overall 1.014 khz insertion loss error of the aslic/aslac devices kit is guaranteed to be 0.34 db. 8. the vbat psrr specifications are valid only when the aslic device is used with the aslac device which generates the anti-sat reference. because the anti-sat reference depends upon the battery voltage sensed by the ibat pin of the aslac device, the psrr of the kit will depend upon the amount of battery filtering provided by cb. 9. must meet at least one of these specifications. 10. these voltages are referred to vref. 11. these limits refer to the two-wire output of an ideal aslic device but reflect only the capabilities of the aslac device. 12. when relative levels (dbm0) are used, the specification holds for any setting of (ax + gx) gain from 0 to 12 db or (ar + gr + rg) from 0 to ? 12 db. 13. this parameter tested by inclusion in another test. 14. the group delay specification is defined as the sum of the minimum values of the group delays for the transmit and the recei ve paths when the transmit and receive time slots are identical and the b, x, r, z filters are disabled with null coefficients. fo r pclk frequencies between 1.03 mhz and 1.53 mhz, the group delay may vary from one cycle to the next. see figure 2, group delay distortion also. 15. these limits reflect only the capabilities of the aslac device. 16. rsr1 = rsr2 = 750 k ? , 0% tol. rgfd1 = 510 ? . 17. dc feed performance derates by 5% when operating from ? 40 c to 0 c and 70 c to 85 c. 18. threshold values derate by 5% when operating from ? 40 c to 0 c and 70 c to 85 c. 19. power cross and ring trip values derate by 5% when operating from ? 40 c to 0 c and 70 c to 85 c.
22 am79212/am79c202 data sheet the transmit path is defined as the section between the analog input to the aslac device (vin) and the gci voice output of the aslac device a-law/-law speech compressor (see the voice transmission path figure in the technical reference). the receive path is defined as the section between the gci voice input to the aslac device speech expander and the analog output of the aslac device (vout). all limits defined in this section are tested with b = 0, z = 0, and x = r = rg = 1. when rg is enabled, a nominal gain of ? 6.02 db is added to the digital section of the receive path. when ar is enabled, a nominal gain of ? 6.02 db is added to the analog section of the receive path. when ax is enabled, a nominal gain of +6.02 db is added to the analog section of the transmit path. when the gains in the transmit path are set to ax = 0 db and gx = 0 db, a 1014 hz sine wave with a nominal voltage of 0.596 v rms for -law and 0.6 v rms for a-law at the aslac device analog input will correspond to a level of 0 dbm0 at the gci voice output. under these conditions, the overload level of the transmit path is 1.25 v peak referenced to vref. when the gains in the receive path are set to ar = gr = 0 db, a 1014 hz sine wave with a level of 0 dbm0 at the gci voice input will correspond to a nominal voltage of 0.596 v rms for -law and 0.6 v rms for a-law at the analog output of the aslac device. under these conditions, the maximum receive output level is 1.25 v peak referenced to vref. when relative levels (dbm0) are used in any of the following transmission characteristics, the specification holds for any setting of (ax + gx) gain from 0 db to 12 db or (ar + gr + rg) from 0 to ? 12 db. these transmission characteristics are valid for 0 c to 70 c and for vcc = +5 v 0.25 v.
aslic/aslac products 23 attenuation distortion the attenuation of the signal in either path is nominally independent of the frequency. the deviations from nominal attenuation will stay within the limits shown in figure 1. the reference frequency is 1014 hz and the signal level is ? 10 dbm0. minimum transmit attenuation at 60 hz is 24 db. 3000 3400 2 0.6 0 aslac device specification 0.65 ? 0.125 0.125 600 300 200 0 3200 0.80 0.2 attenuation (db) receive path 1 frequency (hz) figure 1. transmit and receive path attenuation vs. frequency
24 am79212/am79c202 data sheet group delay distortion for either transmission path, the group delay distortion is within the limits shown in figure 2. the minimum value of the group delay is taken as the reference. the signal level should be ? 10 dbm0. single frequency distortion the output signal level, at any single frequency in the range of 300 hz to 3400 hz, other than that due to an applied 0 dbm0 sine wave signal with frequency f 0 in the same frequency range, is less than ? 46 dbm0. with f 0 swept between 0 to 300 hz and 3400 hz to 12 khz, any generated output signals other than f 0 are less than ? 28 dbm0. this specification is valid for either transmission path. intermodulation distortion two sine wave signals of different frequencies f1 and f2 (not harmonically related) in the range 300 hz to 3400 hz and of equal levels in the range ? 4 dbm0 to ? 21 dbm0 will not produce 2 ? ( f1 ? f2) products having a level greater than ? 42 db relative to the level of the two input signals. a sine wave signal in the frequency band 300 hz to 3400 hz with input level ? 9 dbm0 and a 50 hz signal with input level ? 23 dbm0 will not produce intermodulation products exceeding a level of ? 56 dbm0. these specifications are valid for either transmission path. 0 500 600 1000 2600 2800 90 150 420 delay (s) aslac device specification (either path) frequency (hz) figure 2. group delay distortion
aslic/aslac products 25 gain linearity the gain deviation relative to the gain at ? 10 dbm0 is within the limits shown in figure 3 (a-law) and figure 4 (-law) for either transmission path when the input is a sine wave signal of 1014 hz. 0.55 0.25 0 ? 0.25 ? 0.55 ? 1.5 ? 55 ? 50 ? 40 ? 10 +3 1.5 gain (db) input level (dbm0) 0 aslac device specification figure 3. a-law gain linearity with tone input (both paths) note: relax specification by 0.05 db at ? 40 c. 0.45 0.25 0 ? 0.25 ? 0.45 ? 1.4 ? 55 ? 50 ? 37 ? 10 +3 1.4 gain (db) input level (dbm0) 0 aslac device specification figure 4. -law gain linearity with tone input (both paths) note: relax specification by 0.05 db at ? 40 c.
26 am79212/am79c202 data sheet total distortion including quantizing distortion the signal-to-total distortion ratio will exceed the limits shown in figure 5 for either path when the input signal is a sine wave signal of frequency 1014 hz. improved distortion at lower levels in lssgr applications can be obtained by proper selection of the gx and gr ranges. figure 5. total distortion with tone input (both paths) input level (dbm0) signal-to-total distortion (db) aslac device specification 0 ? 30 ? 40 ? 45 c d a a-law -law a 35.5 db 35.5 db b 35.5 db 35.5 db c 30 db 31 db d 25 db 27 db b
aslic/aslac products 27 overload compression figure 6 shows the acceptable region of operation for input signal levels above the reference input power (0 dbm0). the conditions for this figure are: (1) 1 db < transmit path +12 db; (2) ? 12 db receive path < ? 1 db; (3) digital voice output connected to digital voice input; and (4) measurement analog-to-analog. fundamental output power (dbm0) fundamental input power (dbm0) 1 2 3 4 5 6 7 8 9 1234 567 89 acceptable region 2.6 figure 6. a/a overload compression
28 am79212/am79c202 data sheet switching characteristics microprocessor interface min. and max. values are valid for all digital outputs with a 100 pf load, except du which is valid with 8 loads, (see note 2). data clock for 2.048 mhz 100 ppm or 4.096 mhz 100 ppm notes: 1. the data clock (dcl) may be stopped in the high or low state indefinitely without loss of information. 2. the drive capability of the gci interface allows eight aslac devices per linecard (eight subscriber lines) without using exte rnal buffers. table 7. microprocessor interface no. symbol parameter min. typ. max. units note 1t fsw fs high pulse width 130 ns 2t fsr fs rise time of clock 60 ns 3t fsf fs fall time of clock 60 ns 4t fss fs setup time 70 t dcl ? 50 ns 5t fsh fs hold time 50 ns 6t ddc output delay from dcl 100 ns 7t ddf output delay from fs 150 ns 8t ids input data setup time t dch +20 ns 9t idh input data hold time 50 ns 10 t rst reset pulse width 50 s table 8. data clock no. symbol parameter min. typ. max. units note 11 t dcy data clock period (2.048 mhz) 478 488.28 498 ns 2 data clock period (4.096 mhz) 239 244.14 249 ns 12 t dcr rise time of clock 60 ns 13 t dcf fall time of clock 60 ns 14 t dch dcl high pulse width 90 ns 1 15 t dcl dcl low pulse width 90 ns 1
aslic/aslac products 29 switching waveforms input and output waveforms for ac tests data clock timing ? dcl test points 2.0 0.8 2.0 0.8 }{ 2.4 0.45 15 13 v ih v il 11 12 14
30 am79212/am79c202 data sheet gci waveforms detail a dcl* fs du dd dcl fs dd, du bit 7 bit 6 * timing diagram valid for f dcl = 4096 khz gci timing (detail a) 12 13 14 11 15 4 5 1 7 6 8 9
aslic/aslac products 31 table 9. user-programmable components z t is connected between the vtx and rsn pins. the fuse resistors are r f . z 2win is the desired 2-wire ac input imped- ance. when computing z t , the internal current amplifier pole and any external stray capacitance between vtx and rsn must be taken into account. z rx is connected from vrx to rsn. z t is defined above, and g 42l is the desired receive gain. thermal management equations (normal active and tip open states) r tmg is connected from tmg to vbat and is used to re- duce power dissipation within the aslic device in normal active and tip open states. power dissipated in the thermal management resistor, r tmg , during normal active and tip open states power dissipated in the aslic device while in normal active and tip open states thermal management equations (polarity reverse state) note: aslic device die temperature should not exceed 140 c. power dissipated in the aslic device while in the polarity reverse state total die temperature thermal impedance of the 32-pin plastic leaded chip carrier package z t 63.5 z 2win 2r f ? () ? = z rx z l g 42l ----------- - 254 z t ? z t 63.5 z l 2r f + () ? + --------------------------------------------------------- ? = r tmg v bat voff ? i loop ------------------------------------ - = p rtmg v bat voff ? i loop r l ? () ? () 2 r tmg ----------------------------------------------------------------------------------- = p slic v bat i loop ? p rtmg ? r l i loop () ? 2 ? 0.12 w + = p slic v bat i loop r l i loop () 2 ? () ? ? 0.12 w + = t slic p slic ja t ambient + ? = thetaja ja () 43 c ? watt =
32 am79212/am79c202 data sheet aslic/aslac devices linecard ad rsn vtx hpa hpb chp sa isum idif c1 c2 ring bus rrx c.o. battery vref vref vout vin isum idif iab ringout iref rref c1 c2 i/o1 i/o2 ry1out k1 agnd dgnd vcca vccd vcc gnd bgnd +5 v c3 cbat ry2out tmg rtmg a rfa cad rfb bd sb vcc u3 c4 k1a k2 k1b b k2b k2a rsa rsb vdc k3 rgfd1 +5 v +5 v 1 2 3 4 rsr2 rsr1 vlbias vlbias c.o. battery c5 irta irtb idc idc d1 ry3out k4 rm vm cdc1 rt ibat + rbat1 cb rbat2 + + + + cs + + polarized capacitor non-polarized capacitor + indicates bias battery ground analog ground digital ground *these pins are unavailable for 32-pin plcc option. o1 i1 cm vref cdif vbat rsvd ( ? ) cbd test bus r t e s t rab aslic device (32-pin plcc) aslac device (32-pin plcc) u1 u2 figure 7. aslic/aslac typical linecard schematic nc bal2 nc dd du rst fs dcl s0 s1 s2 id straps gci back plane vinm nc bal1 nc
aslic/aslac products 33 notes: * value can be adjusted to suit application. ** can be looser for relaxed ring trip reucquirements. 1% match (each resistor 0.5%) gives 1.275 ma uncertainty in ringing current sensing. table 10. aslic/aslac devices linecard parts list item type value tol. rating comments u1 aslic device u2 aslac device u3 lcp150s transient voltage suppressor, sgs-thomson d1 diode 100 ma 100 v 50 ns rfa, rfb resistor 50 ? 2% 2 w fusible protection resistors rsa, rsb resistor 200 k ? 2% 1/4 w sense resistors rsr1, rsr2 resistor 750 k ? 2% 1/4 w matched to within 0.2% for initial tolerance and 0 c to 70 c ambient temperature range.** 17 mw typ rgfd1 resistor 510 ? 2% 2 w 1.2 w typ rrx, rt* resistor 16.9 k ? 1% 1/8 w <1 mw rbat1, rbat2 resistor 365 k ? 1% 1/8 w 2.5 mw typ rab resistor 35.7 k ? 1% 1/8 w <1 mw rref resistor 7.87 k ? 1% 1/8 w <1 mw rtmg * resistor 1200 ? 5% 4 w application dependent rm* resistor 3.16 k ? 1% 1/8 w <1 mw rtest resistor 3 k ? 1% 5 w used only if ringing tests are required cdif capacitor 10 nf 20% 5 v ceramic cad, cbd * capacitor 22 nf 10% 100 v ceramic, not voltage sensitive cbat capacitor 150 nf 20% 100 v ceramic, vbat typ chp capacitor 220 nf 20% 100 v ceramic, vbat typ cb capacitor 100 nf 20% 100 v ceramic, 0.5 vbat typ cdc1 capacitor 1.0 f 20% 5 v ceramic cm* capacitor 1.8 nf 10% 5 v ceramic cs * capacitor 100 nf 20% 100 v protector speed up capacitor k1, k2, k3, k4 relay 5 v coil dpdt
34 am79212/am79c202 data sheet physical dimension pl032 revision summary revision a to revision b under connection diagrams, top view, fixed the aslic device to read am79212 instead of am79c212. minor changes were made to the data sheet style and format to conform to amd standards. revision b to revision c the physical dimension (pl032) was added to the physical dimension section. updated the pin description table to correct inconsistencies. minor changes were made to the data sheet style and format to conform to amd standards. .050 ref. .026 .032 top view pin 1 i.d. .485 .495 .447 .453 .585 .595 .547 .553 16-038fpo-5 pl 032 da79 6-28-94 ae side view seating plane .125 .140 .009 .015 .080 .095 .042 .056 .013 .021 .400 ref. .490 .530
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